Just curious if you've ever considered a Verilog version of Leetcode. I've got a lot of experience with uniprocessor code but I'd love to see a section where one could write Verilog code to interface to your processor code and solve problems. You could run the Verilog in either a simulation (i.e. Verilator) or map it to an FPGA. This could be used for evaluating FPGA/Hardware designers or those of us who are strong in both.